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5.5 Audio - Register
Falcon Audio Register
****************************************************************************
P S G - S O U N D C H I P AY-3-8910
****************************************************************************
$FFFF8800 [R/-] Read Data
[-/W] Register Selection
$FFFF8801 [R/W] ******
$FFFF8802 [R/W] Write Data
$FFFF8803 [R/W] ******
$FFFF8800 [R/-] 76543210 .......................... PSG Register 14 (Port A)
||||||||
|||||||+-- Sideselect: 0:side 1/1:side 0
||||||+--- Drive A Select: 0:on/1:off
|||||+---- Drive B Select is not connected in FALCON 030
||||+----- Printer Select In
|||+------ DSP Reset: 0:no reset/1:reset
||+------- Strobe Parallelport
|+-------- internal Speaker: 0:on/1:off
+--------- IDE Reset: 0:no reset/1:reset(HD slows down)
NOTE: The PSG-Registers are now fixed at 2 addresses($8800.w/$8802.w).
Accessing the shadowregisters ($8804.w-$8900.w) cause a buserror.
****************************************************************************
A U D I O - S U B S Y S T E M
****************************************************************************
$FFFF8900 [R/W] ____3210 .............................. Sound-DMA-Control Hi
||||
|||| MFP I/O-Port-7 Request
||00-- no request
||01-- after playing a frame
||10-- after recording a frame
||11-- after playing or recording a frame
||
|| MFP Timer-A-Request
00---- no request
01---- after playing a frame
10---- after recording a frame
11---- after playing or recording a frame
$FFFF8901 [R/W] 7_54__10 ................................................ Lo
| || ||
| || |+-- 1: DMA-Play enable
| || +--- 1: DMA-Play frame repeat
| |+------ 1: DMA-Record enable
| +------- 1: DMA-Record frame repeat
+--------- 0: select playframe-adresses
1: select recordfame-adresses
$FFFF8902 [R/W] ******
$FFFF8903 [R/W] 76543210 ............................ Frame-Start-Address Hi
$FFFF8904 [R/W] ******
$FFFF8905 [R/W] 76543210 ................................................ Mi
$FFFF8906 [R/W] ******
$FFFF8907 [R/W] 7654321_ ................................................ Lo
$FFFF8908 [R/W] ******
$FFFF8909 [R/W] 76543210 ...........................Frame-Address-Counter Hi
$FFFF890A [R/W] ******
$FFFF890B [R/W] 76543210 ................................................ Mi
$FFFF890C [R/W] ******
$FFFF890D [R/W] 7654321_ ................................................ Lo
$FFFF890E [R/W] ******
$FFFF890F [R/W] 76543210 .............................. Frame-End-Address Hi
$FFFF8910 [R/W] ******
$FFFF8911 [R/W] 76543210 ................................................ Mi
$FFFF8912 [R/W] ******
$FFFF8913 [R/W] 7654321_ ................................................ Lo
HOW to access the play/record-frame:
You have to set bit 7 of $8901.w to select play- or record-shadowregister,
then access the frame-begin/end-registers! The play- and record-shadow-
register are two seperate registers; they appear only at the same
addresses!
$FFFF8920 [R/W] _654_210 ............................. Sound-Mode-Control Hi
||| |||
||| |00-- play 1 track
||| |01-- play 2 tracks
||| |10-- play 3 tracks
||| |11-- play 4 tracks
||| +---- ??unknown??
|00------ connect track 1 with speaker
|01------ connect track 2 with speaker
|10------ connect track 3 with speaker
|11------ connect track 4 with speaker
+-------- ??unknown??
$FFFF8921 [R/W] 76____10 ................................................ Lo
|| ||
|| 00-- nute condition (on STE: 6258 Hz)
|| 01-- 12517 HZ
|| 10-- 25033 HZ
|| 11-- 50066 HZ
|+-------- 0: 8 Bit
| 1: 16 Bit
+--------- 0: Stereo
1: Mono
$FFFF8922 [R/W] ________
$FFFF8923 [R/W] ________
$FFFF8924 [R/W] 76543210 ??unknown??
$FFFF8925 [R/W] 76543210 ??unknown??
$FFFF8930 [R/W] 76543210 ............................ Source-Device-Clock Hi
||||||||
|||||||| Source-Device: EXT-INP
|||||||+-- Handshaking: 0:on/1:off
|||||++--- Source-Clock
||||+----- ??unknown??
||||
|||| Source-Device: A/D-Converter
|||+------ ??unknown??
||+------- 0: internal 25.175 MHz-Clock
|| 1: extermal Clock
|+-------- set to zero
+--------- ??unknown??
$FFFF8931 [R/W] 76543210 ................................................ Lo
||||||||
|||||||| Source-Device: DMA-PLAY
|||||||+-- Handshaking: 0:on/1:off
|||||++--- Source-Clock
||||+----- 0: if handshaking and destination=DSP-REC
|||| 1: if destination<>DSP-REC
||||
|||| Source-Device: DSP-XMIT
|||+------ Handshaking: 0:on/1:off
|++------- Source-Clock
+--------- 0: Tristate, disconnect DSP from Multiplexer
(if you want to use the external SSI-Port)
1: connect DSP with Multiplexer
Source-Clock: %00: internal 25.175 MHz-Clock
%01: external Clock
%10: intermal 32 MHz-Clock, do not use it for the CODEC
%11: not defined
$FFFF8932 [R/W] 76543210 ...................... Device-Destination-Matrix Hi
||||||||
|||||||| Destination-Device: EXT-OUT
|||||||+-- Handshaking: 0:on/1:off
|||||++--- Source-Device
||||+----- ??unknown??
||||
|||| Destination-Device: D/A-Converter
|||+------ ??unknown??
|++------- Source-Device
+--------- ??unknown??
$FFFF8933 [R/W] 76543210 ................................................ Lo
||||||||
|||||||| Destination-Device: DMA-REC
|||||||+-- Handshaking: 0:on/1:off
|||||++--- Source-Device
||||+----- 0: if handshaking on and source=DSP-XMIT
|||| 1: if source<>DSP-XMIT
||||
|||| Destination-Device: DSP-REC
|||+------ Handshaking: 0:on/1:off
|++------- Source-Device
+--------- 0: Tristate, disconnect DSP from Multiplexer
(if you want to use the external SSI-Port)
1: connect DSP with Multiplexer
Source-Device : %00: DMA-PLAY
%01: DSP-XMIT (DSP send data)
%10: EXT-INP (External Input)
%11: A/D-Converter
$FFFF8934 [R/W] ____3210 ........................... Prescale external Clock
||||
++++-- 0: ??switch to STE-compatible mode??
1-15: samplingrate=Clock/256/(prescalevalue+1))
$FFFF8935 [R/W] ____3210 ........ Prescale internal Clock (25.175 or 32 MHz)
||||
++++-- look above! According to the developer-
|||| documentation you can only use the following
|||| values for the CODEC(A/D- and D/A-Converter):
|||| 0,1,2,3,4,5,7,9,11
0000-- switch to STE-compatible mode
0001-- CLK50K 49170 Hz
0010-- CLK33K 32780 Hz
0011-- CLK25K 24585 Hz
0100-- CLK20K 19668 Hz
0101-- CLK16K 16390 Hz
0110-- CLK14K 14049 Hz (invalid for CODEC)
0111-- CLK12K 12292 Hz
1000-- CLK11K 10927 Hz (invalid for CODEC)
1001-- CLK10K 9834 Hz
1010-- CLK09K 8940 Hz (invalid for CODEC)
1011-- CLK08K 8195 Hz
1100-- CLK07K 7565 Hz (invalid for CODEC)
1101-- CLK07K 7024 Hz (invalid for CODEC)
1110-- CLK06K 6556 Hz (invalid for CODEC)
1111-- CLK06K 6146 HZ (invalid for CODEC)
NOTE: This register is used for both sourceclocks, 25.175 MHz and 32 MHz.
$FFFF8936 [R/W] ____3210 .............................. Track-Record-Control
||||
||00-- record 1 track
||01-- record 2 tracks
||10-- record 3 tracks
||11-- record 4 tracks
++---- ??unknown??
$FFFF8937 [R/W] ____3210 ......................... CODEC-Hardwareadder-Input
|||| (ADDRIN-register)
|||| Source-input of the 16-bit-hardwareadder
||||
|||+-- 1: input from A/D-Converter
||+--- 1: input from Multiplexer
|+---- ??unknown?? (XBIOS-CALL $8C use this bit)
+----- ??unknown??
NOTE: The CODEC-Hardwareadder-Input connects the D/A-Converter with the
multiplexer or the A/D-Converter. It is also possible to connect both.
In this case the 16-bit-Hardwareadder mix the two signals.
$FFFF8938 [R/W] 76543210 ............................... A/D-Converter-Input
|||||||| (ADCINPUT-register)
|||||||+-- 0: input from right MIC-channel
||||||| 1: input from PSG-channel
||||||+--- 0: input from left MIC-channel
|||||| 1: input from PSG-channel
|||||+---- ??unknown?? (XBIOS-CALL $8C use this bit)
+++++----- ??unknown??
$FFFF8939 [R/W] 76543210 .......... Channel-Input-Amplifier in +1.5 dB steps
|||||||| (GAIN-register)
||||||||
||||++++-- 0-15: Gain right channel (RTGAIN)
++++------ 0-15: Gain of left channel (LTGAIN)
$FFFF893A [R/W] 76543210 ...... Channel-Output-Amplifier in -1.5 dB-steps Hi
|||||||| (ATTEN-register)
||||||||
||||++++-- 0-15: Attenuation of feft channal(LTATTEN)
++++------ ??unknown??
$FFFF893B [R/W] 76543210 ................................................ Lo
||||||||
||||++++-- ??unknown??
++++------ 0-15: Attenuation of right channel(RTATTEN)
$FFFF893C [R/W] ______10 ................................... CODEC-Status Hi
||
|+-- 1: right channel-overflow (read only)
+--- 1: left channel-overflow (read only)
$FFFF893D [R/W] 7654____ ................................................ Lo
||||
|||+------ ??unknown??
||+------- ??unknown??
|+-------- ??unknown?? (read only)
+--------- ??unknown?? (read only)
$FFFF893E [R/W] ******
$FFFF893F [R/W] ******
$FFFF8940 [R/W] _____210 .............................. GPx-Datadirection Hi
|||
+++-- ??unknown??
$FFFF8941 [R/W] ____3210 ................................................ Lo
||||
|+++-- bidirectional Dataportpath of the GP0-
| GP2-Pins on the DSP-Connector
| 0: Pin set to Input (read data from GPx)
| 1: Pin set to Output (write data to GPx)
| (normally %111)
+----- ??unknown??
$FFFF8942 [R/W] ____3210 ................................... GPx-Dataport Hi
||||
|+++-- Shadow-I/O-Data-Bits of $FFFF8943
+----- ??unknown??
$FFFF8943 [R/W] _____210 ................................................ Lo
|||
+++-- Input/Output-Data-Bits of the
GP0-GP2-Pins on the DSP-Connector. This
Pins can be used for userdef. operations.
############################################################################
################## research and documentation by AURA ######################
############################################################################
Copyright © Robert Schaffner (support@doitarchive.de) Letzte Aktualisierung am 23. Dezember 2003 |
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