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11.5.14 CENTurbo II Memory Map


CENTurbo II Memory Map



Hier finden sie die Adressenbelegung bzw. die Speicherverteilung des Atari Falcon mit CENTurbo II Beschleunigern. Die Adressenbelegung ist wichtig für die Verwendung des Beschleunigers mit weiterer Hardware.


Tabelle 29: CT2 Rev A/B/AN/BN - 32-Bit PHYSICAL ADDRESSES MAP
Adressarea Function
$00000000-$00DFFFFF ST-RAM (14 MB)
$00E00000-$00EFFFFF TOS 4.0x ROM (1 MB)
$00F00000-$00F0FFFF I/O IDE (64 KB)
$00F10000-$00F9FFFF F030 BUS SLOT (576 KB)
$00FA0000-$00FBFFFF CARTRIDGE SLOT (128 KB)
$00FC0000-$00FDFFFF Not used (192 KB) Space
$00FF0000-$00FFFFFF I/O (64 KB)
Adressarea Function / Ram
$01000000-$02FFFFFF 32-Bit FAST-Ram (Rev AN/BN)(32 MB)
$03000000-$08FFFFFF 32-Bit FAST-Ram (Rev BN) (96 MB)
$04000000-$05FFFFFF 32-Bit FAST-Ram (Rev A/B) (32 MB)
$06000000-$0BFFFFFF 32-Bit FAST-Ram (Rev B) (96 MB)
$0C000000-$7FFFFFFF Reserved (1856 MB) *
$80000000-$EFFFFFFF Not used - Do not use (1792 MB) CT2
$F0000000-$F3FFFFFF 32-Bit EXP SLOT (Rev A/AN) (64 MB)
$F4000000-$F5FFFFFF BOOT FLASH 64KB (32 MB)
$F6000000-$F6FFFFFF SET UP Registers (16 MB)
$F7000000-$F7FFFFFF FAST-Ram Controller (16 MB)
$F8000000-$FEFFFFFF Reserved (112 MB)
$FF000000-$FFFFFFFF FALCON 24-Bit SHADOW (16 MB)



Description

SET- UP REGISTERS - WRITE BYTE at $F6xx0000
ADD- NAME FUNCTION (if set to 1) REVISION
A18- FLH FLasH WRITE ENABLE B/BN
A19- E32 External Clock at 32 MHz A/AN
A20- ECO External Clock OFF A/B/AN
A21- IDE WS on IDE (Turbo only) A/B/AN/BN
A22- DSP WS on DSP (Turbo only) A/B/AN/BN
A23- CT2 BOOT on F030 (Turbo only) A/B/AN/BN

1-
Data value are sent by the ADDress lines. By example : to set IDE bit at 1, write a byte at $F6200000, where 20 is a byte composed by A21 = 1. If you want to set DSP and IDE to 1, write to $F6600000, where 60 is composed by A22,A21=1,1. Data value (on data bus) don't care.
 
2-
A RESET INSTRUCTION or HARDWARE RESET sets all bits to 0.
 
3-
Read is not possible : use a variable in memory.
 
4-
Externam CLOCK (Bit ECO) is not recommended on Rev B/BN. External clock from CT2 B is not wired on some fitting because of a recently discovered disturbance of the DSP clock ! It is not recommended to use this feature that will no longer be supported ! Don't offer it in the setup of Rev B/BN ! Write bit to 1.
 
5-
FLH,E32 & ECO are available in NORMAL mode too !
 
6-
Bit E32 : 0 = 36 MHz / 1 = 32 MHz on Rev A/AN.
Rev B as only 32 MHz (no E32 bit).
Rev BN has no clock at all (no E32 & ECO)!

 
FAST-Ram CONTROLLER REGISTERS
Rev A/AN : BYTE WRITE at $F730C788
Rev B/BN : BYTE WRITE at $F700000x

 
Rev A/AN

 
Write a BYTE at $F730C788 : this value will be latched by the controller. Use only this address. Any other access to $F7x will modify the controller configuration and may crash the CT2A/AN if the FAST-Ram is already used ! Only 16 and 32MB EDO SIMM can be used.
 
Rev B/BN

 
The memory controller must be configured regarding the size of EDO that is used : A BYTE write to $F7000000= 16/32MB SIMM $F7000001= 64/128MB SIMM
 
In general a 32MB SIMM is a doubled 16MB SIMM and a 128MB is a doubled 64MB SIMM. But, about 64MB there is a type that needs to be used with the 16/32 configuration, because of a different matrix in the chips and a different wiring of the chips on the SIMM. Those 64MB SIMM are rare... The memory test is a little complex : elimination method from the biggest memory size case (128 MB : the upper 64MB window) must be practiced.
 

Any technical information (c) Rodolphe Cezuba






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Letzte Aktualisierung am 23. Dezember 2003
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