9.12 TOS 2.06 Hack

TOS 2.06 upgrade

Picked up a mail from comp.sys.atari.st.tech

David Jackson <72dtao$s92@sjx-ixn4.ix.netcom.com>

Question:
Well, my question comes now; as we all know, with the distribution of various versions of TOS, will the versions that work with Pacifist also work on an EPROM?

Answer:
Yes. But it's two EPROM:s. Pacifist uses a straight TOS image, 256Kb in size for TOS 1.62 or 2.06. The EPROM:s are like a shuffled deck of cards, first byte in chip LO, second in chip HI, third in chip LO, etc. You'd have to make two files out of one TOS image file, with all the odd (LO) bytes in one file, and all the even (HI) in the other.

This has to do with the processor's reading of 16 bits at a time.

On older systems you also have to portion out the odd and even files to 6 EPROM:s.

Question:
Can you share that circuit with me/us/the Atari community?

Answer:
Sure thing. It's at the end of this posting.

Question:
How about up to four different TOS's? May seem pointless, but there's always 1.40, for updated old-software usage, 1.0 for maximum old-software compatibility, 2.06 for everyday use, and KaosTOS when you feel funky.

Answer:
No problem. Done three at most, but this one should be easy to do. Why KAOS? Why not MagiC?

Question:
I should point out that there are disk based TOS: es as well, that might be an easier way to gain a multitude in versions?

Answer:
However, you can also leave the old chips be and just add the new ones. In that case you might want to selectively inhibit one of the TOS:es at a time. Realized through 2.2Kohm resistors and laying +5V to the inhibited circuit's CE pin.

Question:
Where would you mount the new chips?

Answer:
I normally solder two 32p sockets piggyback on two of the old ROM:s. One HI, one LO. I choose the innermost of these because of the increased height. The signal CE must NOT be connected to the sockets! Also pin 1 on the ROM:s must not be connected to the pin above.

The 32p sockets should protrude with four pins on the frontside. Additional couplings must be done depending on what type of EPROM:s you're using.

If the original TOS only uses two ROM:s, then we have four empty sockets to play with.

Regards, MG

The revised schematic after replacing the 74F244 with a simple 1N4148 diode:
(And you can well use LS chips!)

(19,XX)  ROM2_>--------------------------+    +--------+-----+--------+
                                         |    | Chip   | +5V | Ground |
                      74F138             |    +--------+-----+--------+
                  +--------------+       |    | 74F138 | 16  |   8    |
(11,52)    A23>---|a0(1)   q0(15)|o-     |    | 74F08  | 14  |   7    |
(10,51)    A22>---|a1(2)   q1(14)|o-     |    +--------+-----+--------+
(09,50)    A21>---|a2(3)   q2(13)|o-     |
                  |        q3(12)|o-     |  _______
(12,06)    AS_>--o|e1(4)   q4(11)|o-     |  \      \  74F08
(08,48)    A20>--o|e2(5)   q5(10)|o-     +--o\a(1)  \
(55,09)   R/W_>---|e3(6)    q6(9)|o-          )  y(3))o--------> CE_
                  |         q7(7)|o---*-----o/b(2)  /
                  +--------------+    |     /______/
                                      |
(31,10)  DTACK_-------1N4148------>|--+




Figure of the 1N4148:

                       +----------#-+
DTACK <-- =============| 1N4148   # |============ <-- output from q7
                       +----------#-+                (and b2 on the
74F08)
                                 /
                    Cathode Mark/

The current can only go in one direction: From the output q7 of the 74F138 to the DTACK on the motherboard, but not the opposite way.

Also, the 74F08 can (but doesn't have to) be replaced with a 74LS08. Or useone of the two unused 3-input AND gates of the 74LS11 on the motherboard. Not all motherboards are equipped with such a chip. Atari uses them for encoding the three ROM select signals into one, when using only two ROMs for the operating system.

In this case you'd need to tie one of the inputs to +5V, since you only need two of them. You have to see for yourself which gates are unused, since this differs from revision to revision.

Figure of the 74LS11:

    +---\_/---+
1inA|1      14|+5V
1inB|2      13|1inC
2inA|3      12|1out
2inB|4      11|3inC
2inC|5      10|3inB
2out|6       9|3inA
 GND|7       8|3out
    +---------+

The three 3-input AND gates of the 74LS11 are designated 1,2 and 3. The three inputs of each AND gate are given letters A,B and C.

Let's look at a sample solution where gate 3 is available:

       74LS11
    +---\_/---+
    |1      14|+5V -----+
    |2      13|         |
    |3      12|         |
    |4      11|3inC <---+
    |5      10|3inB <------ ROM2
    |6       9|3inA <------ output from q7
 GND|7       8|3out -------> CE
    +---------+

You must always make sure that the gate you want to use really is free and not used for the abovementioned ROM select encoding! Sometimes the inputs are all tied to either +5V or GND. In that case you'd have to break those ties.