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8.5 Videoregister
Einige wichtige F030-Register
Diese Auflistung der Falcon-Register stammt von (c) Aura
Address Size Description Bits used Read/Write
-------+-----+--------------------------------------------+----------
$E00000| |512KB TOS-ROM |R(TT/F030)
: | | |
$EFFFFF| | |
-------+-----+--------------------------------------------+----------
$FA0000| |128KB Cartridge-ROM |R
: | | |
$FBFFFF| | |
-------+-----+--------------------------------------------+----------
############## Falcon030 IDE Controller #############################
-------+-----+--------------------------------------------+----------
$F00000|???? |??? |??? (F030)
: | : | : | : :
$F0003F|???? |??? |??? (F030)
-------+-----+--------------------------------------------+----------
############## Falcon030 Processor Control ##########################
-------+-----+--------------------------------------------+----------
$FF8007|byte |Falcon Bus Control BIT . . 5 . . 2 . 0|R/W (F030)
| |STe Bus Emulation (0 - on) ------' | ||
| |Blitter (0 - 8mhz, 1 - 16mhz) ---------' ||
| |68030 (0 - 8mhz, 1 - 16mhz) ---------------'|
-------+-----+--------------------------------------------+----------
############## Falcon030 VIDEL Video Controller #####################
-------+-----+--------------------------------------------+----------
$FF8006|byte |Monitor Type BIT 1 0|R (F030)
| |00 - Monochrome (SM124) -----------------+-+|
| |01 - Color (SC1224) ---------------------+-+|
| |10 - VGA Color --------------------------+-+|
| |11 - Television -------------------------+-'|
$FF820E|word |Offset to next line |R/W (F030)
$FF8210º¯ord |VWRAP - Linewidth in words |R/W (F030)
$FF8266|word |SPSHIFT BIT 1 . 8 . 6 5 4 . . . .|R/W (F030)
| | 0 | | | | |
| |2-colour mode ---------' | | | | |
| |Truecolour mode -----------' | | | |
| |Use external hsync ------------' | | |
| |Use external vsync --------------' | |
| |Bitplane mode ---------------------' |
| +--------------------------------------------+
| | Horizontal Control Registers (9bit)|
$FF8280|word |HHC - Horizontal Hold Counter |R (F030)
$FF8282|word |HHT - Horizontal Hold Timer |R/W (F030)
$FF8284|word |HBB - Horizontal Border Begin |R/W (F030)
$FF8286|word |HBE - Horizontal Border End |R/W (F030)
$FF8288|word |HDB - Horizontal Display Begin |R/W (F030)
$FF828A|word |HDE - Horizontal Display End |R/W (F030)
$FF828C|word |HSS - Horizontal SS |R/W (F030)
$FF828E|word |HFS - Horizontal FS |R/W (F030)
$FF8290|word |HEE - Horizontal EE |R/W (F030)
| +--------------------------------------------+
| | Vertical Control Registers (10bit)|
$FF82A0|word |VFC - Vertcial Frequency Counter |R (F030)
$FF82A2|word |VFT - Vertical Frequency Timer |R/W (F030)
$FF82A4|word |VBB - Vertical Border Begin |R/W (F030)
$FF82A6|word |VBE - Vertical Border End (count 1/2 lines)|R/W (F030)
$FF82A8|word |VDB - Vertical Display Begin |R/W (F030)
$FF82AA|word |VDE - Vertical Display End |R/W (F030)
$FF82AC|word |VSS - Vertical SS |R/W (F030)
| +--------------------------------------------+
$FF82C2|word |VCO - Video Control BIT 3 2 1 0|R/W (F030)
| |Quarter pixel width (4x pixels) -----' | | ||
| |Halve pixel width (double pixels) -----' | ||
| |Skip line (interlace) -------------------' ||
| |Line doubling -----------------------------'|
-------+-----+--------------------------------------------+----------
############## YM2149 Sound Chip ####################################
-------+-----+--------------------------------------------+----------
$FF8800|byte |Read data/Register select |R/W
| |Port A (register 14) BIT 7 6 5 4 3 2 1 0|
| |frei + | | | | | | || (ST/STE)
| |LAN/Serial2 Select + | | | | | | || (TT)
| |IDE Drive On/OFF ------------' | | | | | | || (F030)
| |Monitor jack GPO pin ----------+ | | | | | ||
| |Internal Speaker On/Off -------' | | | | | || (F030)
| |Centronics strobe ---------------' | | | | ||
| |RS-232 DTR output -----------------' | | | ||
| |RS-232 RTS output -------------------' | | ||
| |Drive select 1 ------------------------' | ||
| |Drive select 0 --------------------------' ||
| |Drive side select -------------------------'|
| |Port B - (register 15) Parallel port |
$FF8802|byte |Write data |W
| +--------------------------------------------+
| |Note: PSG Registers are now fixed at these|
| |addresses. All other addresses are masked|
| |out on the Falcon. Any writes to the shadow|
| |registers $8804-$8900 will cause a bus error|
-------+-----+--------------------------------------------+----------
############## DMA Sound System #####################################
-------+-----+--------------------------------------------+----------
$FF8900|byte |Buffer interrupts BIT 3 2 1 0|R/W (F030)
| |TimerA-Int at end of record buffer --' | | ||
| |TimerA-Int at end of replay buffer ----' | ||
| |MFP-15-Int (I7) at end of record buffer -' ||
| |MFP-15-Int (I7) at end of replay buffer ---'|
-------+-----+--------------------------------------------+----------
$FF8901|byte |DMA Control Register BIT 7 . 5 4 . . 1 0|R/W
| |1 - select record register --+ | | | || (F030)
| |0 - select replay register --' | | | || (F030)
| |Loop record buffer --------------' | | || (F030)
| |DMA Record on ---------------------' | || (F030)
| |Loop replay buffer ----------------------' || (STE)
| |DMA Replay on -----------------------------'| (STE)
-------+-----+--------------------------------------------+----------
$FF8903|byte |Frame start address (high byte) |R/W (STE)
$FF8905|byte |Frame start address (mid byte) |R/W (STE)
$FF8907|byte |Frame start address (low byte) |R/W (STE)
$FF8909|byte |Frame address counter (high byte) |R (STE)
$FF890B|byte |Frame address counter (mid byte) |R (STE)
$FF890D|byte |Frame address counter (low byte) |R (STE)
$FF890F|byte |Frame end address (high byte) |R/W (STE)
$FF8911|byte |Frame end address (mid byte) |R/W (STE)
$FF8913|byte |Frame end address (low byte) |R/W (STE)
-------+-----+--------------------------------------------+----------
$FF8920|byte |DMA Track Control BIT 5 4 . . 1 0|R/W (F030)
| |00 - Set DAC to Track 0 ---------+-+ | ||
| |01 - Set DAC to Track 1 ---------+-+ | ||
| |10 - Set DAC to Track 2 ---------+-+ | ||
| |11 - Set DAC to Track 3 ---------+-' | ||
| |00 - Play 1 Track -----------------------+-+|
| |01 - Play 2 Tracks ----------------------+-+|
| |10 - Play 3 Tracks ----------------------+-+|
| |11 - Play 4 Tracks ----------------------+-'|
-------+-----+--------------------------------------------+----------
$FF8921|byte |Sound mode control BIT 7 6 . . . . 1 0|R/W (STE)
| |0 - Stereo, 1 - Mono --------' | | ||
| |0 - 8bit ----------------------+ | ||
| |1 - 16bit (F030 only) ---------' | || (F030)
| |Frequency control bits | ||
| |00 - Off (F030) -------------------------+-+| (F030)
| |00 - 6258hz frequency (STE only) --------+-+|
| |01 - 12517hz frequency ------------------+-+|
| |10 - 25033hz frequency ------------------+-+|
| |11 - 50066hz frequency ------------------+-'|
| |Samples are always signed. In stereo mode, |
| |data is arranged in pairs with high pair the|
| |left channel, low pair right channel. Sample|
| |length must ALWAYS be even in either mono or|
| |stereo mode. |
| |Example: 8 bit Stereo : LRLRLRLRLRLR |
| | 16 bit Stereo : LLRRLLRRLLRR (F030) |
| |2 track 16 bit stereo : LLRRllrrLLRR (F030) |
-------+-----+--------------------------------------------+----------
############## Falcon030 DMA/DSP Controllers ########################
-------+-----+--------------------------------------------+----------
$FF8930|word |Crossbar Source Controller |R/W (F030)
| +--------------------------------------------+
| |Source: External Input BIT 3 2 1 0|
| |0 - DSP IN, 1 - All others ----------' | | ||
| |00 - 25.175Mhz clock ------------------+-+ ||
| |01 - External clock -------------------+-+ ||
| |10 - 32Mhz clock ----------------------+-' ||
| |0 - Handshake on, 1 - Handshake off -------'|
| +--------------------------------------------+
| |Source: A/D Convertor BIT 7 6 5 4|
| |1 - Connect, 0 - disconnect ---------' | | ||
| |00 - 25.175Mhz clock ------------------+-+ ||
| |01 - External clock -------------------+-+ ||
| |10 - 32Mhz clock (Don't use) ----------+-' ||
| |0 - Handshake on, 1 - Handshake off -------'|
| +--------------------------------------------+
| |Source: DMA-PLAYBACK BIT 11 10 9 8|
| |0 - Handshaking on, dest DSP-REC ---+ | | ||
| |1 - Destination is not DSP-REC -----' | | ||
| |00 - 25.175Mhz clock ------------------+-+ ||
| |01 - External clock -------------------+-+ ||
| |10 - 32Mhz clock ----------------------+-' ||
| |0 - Handshake on, 1 - Handshake off -------'|
| +--------------------------------------------+
| |Source: DSP-XMIT Bit 15 14 13 12|
| |0 - Tristate and disconnect DSP --+ | | ||
| | (Only for external SSI use) | | | ||
| |1 - Connect DSP to multiplexer ---' | | ||
| |00 - 25.175Mhz clock ----------------+--+ ||
| |01 - External clock -----------------+--+ ||
| |10 - 32Mhz clock --------------------+--' ||
| |0 - Handshake on, 1 - Handshake off -------'|
-------+-----+--------------------------------------------+----------
$FF8932|word |Crossbar Destination Controller |R/W (F030)
| +--------------------------------------------+
| |Destination: External Output BIT 3 2 1 0|
| |0 - DSP out, 1 - All others ---------' | | ||
| |00 - Source DMA-PLAYBACK --------------+-+ ||
| |01 - Source DSP-XMIT ------------------+-+ ||
| |10 - Source External Input ------------+-+ ||
| |11 - Source A/D Convertor -------------+-' ||
| |0 - Handshake on, 1 - Handshake off -------'|
| +--------------------------------------------+
| |Destination: D/A Convertor BIT 7 6 5 4|
| |1 - Connect, 0 - Disconnect ---------' | | ||
| |00 - Source DMA-PLAYBACK --------------+-+ ||
| |01 - Source DSP-XMIT ------------------+-+ ||
| |10 - Source External Input ------------+-+ ||
| |11 - Source A/D Convertor -------------+-' ||
| |0 - Handshake on, 1 - Handshake off -------'|
| +--------------------------------------------+
| |Destination: DMA-Record BIT 11 10 9 8|
| |0 - Handshaking on, src DSP-XMIT ---+ | | ||
| |1 - Source is not DSP-XMIT ---------' | | ||
| |00 - Source DMA-PLAYBACK --------------+-+ ||
| |01 - Source DSP-XMIT ------------------+-+ ||
| |10 - Source External Input ------------+-+ ||
| |11 - Source A/D Convertor -------------+-' ||
| |0 - Handshake on, 1 - Handshake off -------'|
| +--------------------------------------------+
| |Destination: DSP-RECORD BIT 15 14 13 12|
| |0 - Tristate and disconnect DSP --+ | | ||
| | (Only for external SSI use) | | | ||
| |1 - Connect DSP to multiplexer ---' | | ||
| |00 - Source DMA-PLAYBACK ------------+--+ ||
| |01 - Source DSP-XMIT ----------------+--+ ||
| |10 - Source External Input ----------+--+ ||
| |11 - Source A/D Convertor -----------+--' ||
| |0 - Handshake on, 1 - Handshake off -------'|
-------+-----+--------------------------------------------+----------
$FF8934|byte |Frequency Divider External Clock BIT 3 2 1 0|R/W (F030)
| |0000 - STE-Compatible mode |
| |0001 - 1111 Divide by 256 and then number |
-------+-----+--------------------------------------------+----------
$FF8935|byte |Frequency Divider Internal Sync BIT 3 2 1 0|R/W (F030)
| |0000 - STE-Compatible mode 1000 - 10927Hz*|
| |0001 - 49170Hz 1001 - 9834Hz |
| |0010 - 32780Hz 1010 - 8940Hz*|
| |0011 - 24585Hz 1011 - 8195Hz |
| |0100 - 19668Hz 1100 - 7565Hz*|
| |0101 - 16390Hz 1101 - 7024Hz*|
| |0110 - 14049Hz* 1110 - 6556Hz*|
| |0111 - 12292Hz 1111 - 6146Hz*|
| | * - Invalid for CODEC |
-------+-----+--------------------------------------------+----------
$FF8936|byte |Record Tracks Select BIT 1 0|R/W (F030)
| |00 - Record 1 Track ---------------------+-+|
| |01 - Record 2 Tracks --------------------+-+|
| |10 - Record 3 Tracks --------------------+-+|
| |11 - Record 4 Tracks --------------------+-'|
-------+-----+--------------------------------------------+----------
$FF8937|byte |CODEC Input Source from 16bit adder BIT 1 0|R/W (F030)
| |Source: Multiplexer ---------------------' ||
| |Source: A/D Convertor ---------------------'|
-------+-----+--------------------------------------------+----------
$FF8938|byte |CODEC ADC-Input for L+R Channel BIT 1 0|R/W (F030)
| |0 - Microphone, 1 - Soundchip L R|
-------+-----+------ ------------------------------------+----------
$FF8939|byte |Channel amplification BIT LLLL RRRR|R/W (F030)
| | Amplification is in +1.5dB steps |
-------+-----+--------------------------------------------+----------
$FF893A|word |Channel attenuation BIT LLLL RRRR ....|R/W (F030)
| | Attenuation is in -1.5dB steps |
-------+-----+--------------------------------------------+----------
$FF893C|byte |CODEC-Status BIT 1 0|R/W (F030)
| |Left Channel Overflow -------------------' ||
| |Right Channel Overflow --------------------'|
-------+-----+--------------------------------------------+----------
$FF8941|byte |GPx Data Direction BIT 2 1 0|R/W (F030)
| |0 - In, 1 - Out -----------------------+-+-'|
| | For the GP0-GP2 pins on the DSP connector |
-------+-----+--------------------------------------------+----------
$FF8943|byte |GPx Data Port BIT 2 1 0|R/W (F030)
-------+-----+--------------------------------------------+----------
############## SCC Z8530 SCC (MSTE/TT/F030) #########################
-------+-----+--------------------------------------------+----------
$FF8C81|byte |Channel A - Control-Register |R/W (SCC)
$FF8C83|byte |Channel A - Data-Register |R/W (SCC)
$FF8C85|byte |Channel B - Control-Register |R/W (SCC)
$FF8C87|byte |Channel B - Data-Register |R/W (SCC)
-------+-----+--------------------------------------------+----------
############## STE Extended Joystick/Lightpen Ports #################
-------+-----+--------------------------------------------+----------
$FF9200|???? |Fire buttons 1-4 |R (STE)
$FF9202|???? |Joysticks 1-4 |R (STE)
$FF9210|???? |Paddle 0 Position |R (STE)
$FF9212|???? |Paddle 1 Position |R (STE)
$FF9214|???? |Paddle 2 Position |R (STE)
$FF9216|???? |Paddle 3 Position |R (STE)
$FF9220|???? |Lightpen X-Position |R (STE)
$FF9222|???? |Lightpen Y-Position |R (STE)
-------+-----+--------------------------------------------+----------
############## Falcon VIDEL Palette Registers #######################
-------+-----+--------------------------------------------+----------
| | BIT 33222222 22221111 11111198 76543210|
| | 10987654 32109876 543210 |
| | RRRRRR.. GGGGGG.. ........ BBBBBB..|
$FF9800|long |Palette Register 0 |R/W (F030)
: | : | : : : | : :
$FF98fc|long |Palette Register 255 |R/W (F030)
-------+-----+--------------------------------------------+----------
############## Falcon DSP Host Interface ############################
-------+-----+--------------------------------------------+----------
$FFA200|byte |Interrupt Ctrl Register BIT 7 6 5 4 3 . 1 0|R/W (F030)
X:$FFE9| |INIT bit --------------------' | | | | | ||
| |00 - Interupt mode (DMA off) --+-+ | | | ||
| |01 - 24-bit DMA mode ----------+-+ | | | ||
| |10 - 16-bit DMA mode ----------+-+ | | | ||
| |11 - 8-bit DMA mode -----------+-' | | | ||
| |Host Flag 1 -----------------------' | | ||
| |Host Flag 0 -------------------------' | ||
| | Host mode Data transfers: | ||
| | Interrupt mode | ||
| |00 - No interrupts (Polling) ------------+-+|
| |01 - RXDF Request (Interrupt) -----------+-+|
| |10 - TXDE Request (Interrupt) -----------+-+|
| |11 - RXDF and TXDE Request (Interrupts) -+-+|
| | DMA Mode | ||
| |00 - No DMA -----------------------------+-+|
| |01 - DSP to Host Request (RX) -----------+-+|
| |10 - Host to DSP Request (TX) -----------+-+|
| |11 - Undefined (Illegal) ----------------+-'|
$FFA201|byte |Command Vector Register |R/W (F030)
X:$FFE9| | BIT 7 . . 4 3 2 1 0|
| |Host Command Bit (Handshake)-' | | | | ||
| |Host Vector (0-31) ----------------+-+-+-+-'|
$FFA202|byte |Interrupt Status Reg BIT 7 6 . 4 3 2 1 0|R (F030)
X:$FFE8| |ISR Host Request ------------' | | | | | ||
| |ISR DMA Status ----------------' | | | | ||
| |Host Flag 3 -----------------------' | | | ||
| |Host Flag 2 -------------------------' | | ||
| |ISR Transmitter Ready (TRDY) ----------' | ||
| |ISR Transmit Data Register Empty (TXDE) -' ||
| |ISR Receive Data Register Full (RXDF) -----'|
$FFA203|byte |Interrupt Vector Register |R/W (F030)
$FFA204|byte |Unused | (F030)
$FFA205|byte |DSP-Word High |R/W (F030)
X:$FFEB| | |
$FFA206|byte |DSP-Word Mid |R/W (F030)
X:$FFEB| | |
$FFA207|byte |DSP-Word Low |R/W (F030)
X:$FFEB| | |
-------+-----+--------------------------------------------+----------
Copyright © Robert Schaffner (support@doitarchive.de) Letzte Aktualisierung am 23. Dezember 2003 |
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