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11.7.1 CT60 Accelerator
CT60 F030 Beschleuniger
Zum CT60 gibt es hier die ersten Tips, ein erstes Bild, das den
Einbau des Beschleunigers unterstützen soll. Die ersten
Beschleunigerboards wurdem am 20.06.2003 mit der Post versendet. Die
Tips in englischer Sprache sind von Rodolphe Czuba, Tips in deutscher
Sprache vom Autor der FAQ.
Abbildung 1 - CT 60 Beschleuniger Platine
http://www.czuba-tech.com/
THE MC68060 CLOCK
Some people and some companies, especially french ones, announce
the 68060 to be cadenced at 120 MHz on the HADES 060. This is totally
wrong and only reflects the technical ignorance about the 68060 and
the marketing lies of some companies !
The 060 is cadenced by only one clock : the CLK (that is the PCLK
of the 040 socket !).
You have to know that the 060 is built with the 'STATIC'
technology that allows this 060 to be cadenced with lower frequencies,
even 0 MHz (no clock at all) in the purpose to reduce consummation as
much as possible... But, the way to exit this mode is to send a
non-masked interrupt or a RESET to the 060.
Therefore, the 060 has an internal clock control logic which
itself is also cadenced by an internal clock, which works constantly !
Yes, it's this logic which gets the interrupt and exits the 060 from
its 'low power mode'. This is also the logic which stops or starts the
PLL (phase-lock loop), which has to synchronize the external clock
with the internal clock ! It constantly monitors this PLL and if
unphased, returns an external signal LOC/ (Loss Of Clock). This
signal, for example, is a variation of the CLK sent to the processor.
The clock can only be modified during RESET or LOW POWER MODE !
Therefore, the 060 can't (in real time) do an external DX2 like it is
possible on some accelerator cards (CENTurbo II, CENTurbo I 20/40 (1st
generation), Speed Resolution Card, etc...).
Let's turn theory into practice :
Just a little demonstration with a FALCON, an HADES 060, and
GEMBENCH 4.03 with the INTEGER DIV test which consists of DIVU.W
dx,dx. We read the timings for this DIVU in the Motorola DATABOOK of
the 030 and the 060.
For the 030: 44 clock cycles to execute the DIVU.
Here is the equation, no comment.
On the one hand, we have the theory with the DATABOOK (if some
people want to interpret the DATABOOK differently, we ARE LISTENING!)
which gives 750 and on the other hand, a real test on a machine which
gives 767 !
So, the hypothesis for the 060 at 60 MHz is proven correct. If the
060 was at 120 MHz, like some people would stupidely like us to
believe, the gembench test should have been closer to :
1500 = (44/22) x (120/16) !
Remark : The BUS of the HADES 060 is cadenced at 30 MHz !
A little bit of COMMON SENSE : why would a processor manufacturer
announce on its processors a clock which would only be half of what
the processor calculates for real ?!! Have you ever seen, a
manufacturer half under-estimating its products against the
competition? Moreover, to not even talk about it in its documentations
??!!! Us, Never !
CONCLUSION : The 68060 is cadenced at 60 MHz (the clock input !)
even if there is an internal DX2 clock !
Rodolphe Czuba
My only regret is the same as the one about the 040 ! Moral :
before believing and/or stupidly repeating the proposals of others,
verify for yourself, or verify it with REAL professionals!
This is the latest news about CT60 software package, now in the
archive http://didier.mequignon.free.fr/files/ct60_404.lzh (1,25 MB)
there are a new version of Flash Tool CT60 v1.1 (sources are inside):
The main task of this program is to put TOS binary (.BIN) files
inside the flash, but the second task is to update the CT60 hardware
!!!! with two jedec files (.JED) for ABE60 et SDR60 chips (XILINX
XC95144XL CPLD).
- You need to make the cable for the JTAG CT60 connector linked to
// port,there are a schema.pdf inside the archive, but you must
replace the SELECT/ pin 13 on the // port by the ACK/ pin 10.
- Normally the cable must be attached and powered (by the CT60)
for proper verification. Only SDR60 can only programmed (or verified)
when the CT60 is connected to the mother board in normal 030 mode (if
you use the same machine CT60/F030 ;-) ). If you update the ABE60 chip
you need to remove the CT60 from the bus.
- If you load the good jedec files, another button appears
'verify'. You can use this button for compare the jedec file with the
chip. The 'program' button erase, program, and verify his flash.
I can update this program for the future Super Videl.
Didier MEQUIGNON Aniplayer download: http://aniplay.atari.org
Please don't call a FULL 060 as a RC! It's a mistake!
RC is a suffix that designates a package = Pin Grid Array (PGA)
CERAMIC ! For info you could find RP (PGA Plastic !) All 060, EC, LC
and FULL are ALL RC...!
It's explained on my web page :
EC
Whre xx = speed = 50, 60, 66 (very rare !).
The package is :
- A ON/OFF switch + 2 wires + HE13/14 Femal 2 pins connector to
connect on the CT60 connector to allow you to go back to 030 mode
This is not fiurnished (sorry !) but will you yet use the 030 mode
??? You can put a jumper if you really need to go back if you don't
know how to solder 2 wires.If you solder 2 wires, please don't solder
on the pins of the connector (let them clean for me if I need it !),
but undfer the board on the solders of this connector.
1-
For those of you that get a CT60 without 060, it is your
responsability to plug your 060 and stick the heatsink on the 060!
Don't be stupid with this operation! a bad insertion of the 060 in the
socket will destroy it!
Not using the heatsink (and the fan is to be used too if the
machine is closed !) may destroy the 060!
USE a THERMAL STICK! It's maybe expensive but a classical stick
will not dissipate the 060! SEE the WEB SITE pictures (will be ready
tomorrow !) to see how to get the 060 on the board and how to stick
the heatsink in the better position for falcon original cases!
For original cases, the fan can not be plugged on the heatsink if
you keep the keyboard in the initial position. There are several ways
possibles to get the fan near the 060. Imagine...
2-
Some of you (those who get a 60 MHz 060 model, have a 72 MHz
oscillator in the package! This is for pure fun because I don't
support the 72 MHz configuration! Some tests show that the few 060 /60
I tried have timing problems with caches. The actual loaded SDR chips
don't support 72 MHz.
To try the 72 MHz, you need to:
- make a download cable (see the downloadable CT60.LZH package). -
download the SD4D version of SDR (the actual is SD4F): those files
will be on my web site.
What are the difference between SDR 4D et 4F?
I see nothing else to tell you now (all will be present in the
fitting file)....except ...
Taken from comp.sys.atari on 31.05.2003, two years after anouncing
CT060.
This concerns only people who will boost their falcon mb fitting
the CT60 WITH solders!
I correct some timings into ABE to allow 50 MHz clock to
motherboard intead of the 40. This means that you will be able to
replace the 40 MHz oscillator by a 50 MHz to speed the Falcon bus to
25 MHz and the VIDEL / DSP to 50 MHz, all like the CT2.
But the CT60 offer something better : the write accesses are
always in 3 clock cycles instead of 4! So, CT60 will offer same video
mode than the CT2 but with better ST-ram / video speed performances.
The ABE version (AB50) for 50 MHz is different with the one for
the 40 MHz (AB4x). CT60 have a 40 soldered oscillator, so they will be
programmed with a 40 MHz timing. I call again that it is possible to
program yourself the hardware chips making a download cable between
the // port of the falcon (or PC) and the JTAG connector of the CT60.
If you want to see the schematic of this cable to realize it (I
recommend because some updates will surely arrive about ABE and SDR);
download now the 1.5 MB CT60 archive at Didier Mequignon (see the link
on my web site).
A last thing : if you have a 80ns 4MB ram card (the atari model),
videl does not read correctly the data for the screen (some noisly
pixels). So, the 50 MHz video modes are reserved for those who have 60
ns RAM like EDO DIMM on a board (and the board must be well routed =
I'm sure about the CTR14, but I remember that some models have too
long traces and get some bad pixels on screen too).
For your info, 242 CT2 were sold and all were at 50 MHz : no videl
were destroyed as I know....
During this last 10 years, everybody heart about 'cracks' on audio
or SCSI/floppy data problems, especially when boosting the mb. Atari
furnished a patch with a 74F08 onto the GAL U63 to bufferize the bus
clock going to 3 directions, especially the SDMA, and this on standard
falcons. This patch was called 'Cubase clock modification' for those
who had to install it.
OK, after several month passed several years ago on CT2 to fix
this problem, I was not sure to know the real raeson of the problem.
Every body (and atari) was thinking that the bad quality of the clock
to SDMA was the cause of the problems (so the 74F08 fitting).
But after using the 200 MHz logic analyser I can reveal that the
first reason is a big bug into the VIDEL chip ! Some times the data
arrive later (Videl switches the 32-bit memory bus to the 16-bit CPU
bus) and because the timing to latch the data from SDMA is very short,
some data are missed !
All the patchs like 74F08, nemesis termination with resistor on
SDMA clock trace are not perfect at all ! Their just modify the edge
of the clock and allow to win 1 or 2 ns when latching the data ! But
the bug into VIDEL is depending too of the Video resolution you use
and the temperature of the machine !
I now design a patch that will simply add a Wait State to the SDMA
transfer to be sure that it latches the data when really present &
stabilized on the data bus.
If you want to boost your MB at 25 MHz, it is now possible with ST
RAM READ by 4 cycles like at 16 & 20 MHz, but ONLY if your RAM is
60 ns AND you do the following patch!
- IF you use a 14 MB ST-RAM card with a 60 ns SIMM, you have to
add a patch on the F30 clock going to CT60. You need a 74F08, using 1
gate, to replace the R216 resistor on the motherboard. Solder the
74F08 on the GAL U63 connecting the pin #14 (Power) on the pin #14 of
the GAL and connecting pin #7 (Ground) with pin #7 of the GAL with a
wire or, better, a part of a resistor pin.
Connect pin #12 & 13 together and connect to the forward pad
of the R216 place.
Abbildung 2 - CT60 Mainboard Modifikation für 25Mhz Takt
- IF you use a 80 ns ST-RAM card (Atari 4 MB board) or a 70 ns
SIMM on a board, you must program the ABE chip with the 25 MHz special
version .JED file.
You need the JTAG cable for that...
Problem:
Why?
Normally the BYTE accesses to SDMA IO registers is not allowable
by SDMA : Only WORD are suported, but because of a feature added by
atari in the GAL U62 generating UDS & LDS signals, the Byte
accesses becomes word access.....in 030 mode. eh eh I just not put the
same feature in ABE to generate UDS & LDS and the BYTE accesses
were not transformed to WORD accesses....
Solutions:
Hier gibt es eine kurze Beschreibung wie man den ABE Chip auf den neuesten Stand bringt. Einige scheinen damit arge Probleme zu haben. (nl) 1. Es wird ein JATG Kabel beötigt. Und zwar das von den
Czuba-Webseiten!
Modifikation:
Es ist ein Widerstand (Wert beliebig zwischen 1K und 10K) zwischen
Pin 1 und Pin 10 von EINEM der drei 74LVC245A ICs zu löten die
sich auf der rechten Seite des Oszilators befinden. Dazu gibt es hier
ein Bild.
Wenn das Programm: FLASH060 im 030 Mode gestartet wird muß NVDI installiert sein!
Abbildung 2 - Modifikation - Flashen im eingebautem Zustand
DANACH und nur danach ist der CT060 Flashbar auch wenn er im
Falcon steckt. Der Vorteil ist klar, das Update kann erfolgen ohne das
man den CT060 aus dem Falcon ausbauen muß.
Abbildung 3 - JTAG Kabel, einfache Version
1. Es darf kein Festplattentreiber kleiner HDDriver 7.60 verwendet
werden.
Beachten sie das nicht kommt es zu Datenverlusten auf ihren
vorhanden Festplatten.
Die Bootreihenfolge im Autoordner muß strikt eingehalten
werden:
Danach erst wird ein eventuelles MagiC geladen!
4. MAGXBOOT.PRG
Und dann erst alles andere.
XCONTROL.ACC in seiner vorhandenen Form bringt Busfehler beim
booten. Entfernen sie dieses .ACC oder Patchen sie es nach der
Anleitung im Ordner CPX aus dem File: CT60_404.LZH
COPS ist ein guter Ersatz für XCONTROL und man spart sich das Patchen, das bei einigern Versionen von XCOLTROL so wie so nicht zu funktionieren scheint. MagiC)
Für ein MagiC 6.01 bis 6.20 reicht es nicht einfach nur das
modifizierte MAGXBOOT.PRG in den Autoordner zu legen, es müssen
noch diverse Files per Hand an andere Stellen in den Ordner C:/GEMSYS/
kopiert werden. Vorher läuft es nicht!
Der erste Schritt ist das auf C: befindliche File MAGIC.RAM zu
patchen.
Dazu bewegen sie das Programm MAGIC_P.PRG auf C:/ und führen
es aus. Das Patchen von MAGIC.RAM sollte ohne Fehlermeldung
abgeschlossen werden. Der Vorgang ist sehr schnell.
Zweiter wichtiger Punkt für ein funktionierendes MagiC ist
der Ordner C:/GEMSYS/. Und zwar machen sie genau das:
1. In den Ordner /GEMSYS/MAGIC/XTENSION/ kopieren sie das File:
LOAD_IMG.SLB
und das war½s dann auch schon. Mit exakt dieser
Vorgehensweise habe ich auf dem CT060 Falcon mein MagiC laufen.
Copyright © Robert Schaffner (support@doitarchive.de) Letzte Aktualisierung am 23. Dezember 2003 |
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